The following figure shows the internal structure of the GAL16V8 Programmable Logic Device (PLD). Su

The following figure shows the internal structure of the GAL16V8 Programmable Logic Device (PLD). Suppose that we want to implement a full adder circuit using I1, I2, I3 inputs and O1, O2 outputs. I1, I2 input; I3 hand input (CIN) sign, O1: total (SUM), O2: hand output (COUT).

a) Write the Full Adder function using AND, OR, NOT gates (5 points)

b) Specify which connections should be made on GAL16V8 to perform this function. (10 points).

c) Draw the fuse structure required to program these connections (5 points)

**Note that there is an inverter at the outputs.** CLK 9 1011 12 13 1415 1617 1819 20 21 2223 24 25 26 27 2293031 0121 4567 (19) 01 1 (18) 02 2 (17) 03 13 (16) 04 Q 4. (15) O5 (6 15 (14) 06 D Q 16 (13) 07 17 (12) Q8 8 (9) OE L

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